1. Field of the Invention
The present invention relates to an amplifying circuit suitably used for high-frequency radio devices such as a portable telephone set. In particular, the present invention relates to an amplifying circuit which can be stably used, even when formed on a silicon substrate, for a portable telephone set as a first stage amplifying circuit to which signals received by a receiving antenna are directly input.
2. Description of the Prior Art
FIG. 1 is a circuit diagram showing a prior art amplifying circuit disclosed in JP-A No. 7-263977. In FIG. 1, reference numeral 16 indicates an input terminal through which an input signal of a predetermined frequency is input to the amplifying circuit; 17 indicates an output terminal from which a signal amplified by the amplifying circuit is output; 18 indicates a first stage NPN type transistor having a base electrode connected to the input terminal 16 through a reactance element 20, an emitter electrode grounded, and a collector electrode connected to a high voltage side power supply of the amplifying circuit through a first stage load resistor 19; 31 indicates a second stage NPN type transistor having a base electrode connected to the collector electrode of the first stage NPN type transistor 18, an emitter electrode grounded through an emitter register 33, and a collector electrode connected to the output terminal 17 and the high voltage side power supply through a second stage load registor 32; 19 indicates the first stage load resistor connected across the collector electrode of the first stage NPN type transistor 18 and the high voltage side power supply; 32 indicates the second stage load resistor connected across the collector electrode of the second stage NPN type transistor 31 and the high voltage side power supply; 33 indicates the emitter resistor connected across the emitter electrode of the second stage NPN type transistor 31 and a ground potential; and 20 indicates a matching reactance element connected across the input terminal 16 and the base electrode of the first stage NPN type transistor 18 to match an input impedance from the viewpoint of the input terminal 16 with a predetermined impedance. A voltage generated at the emitter resistor 33 is fed-back to the node between the input terminal 16 and the matching reactance element 20.
The operation of the prior art amplifying circuit will be described hereinafter.
When an input signal of a predetermined frequency is inputted into the input terminal 16, since impedance matching is established by the matching reactance element 20, a signal having an amplitude equal to that of the input signal is inputted into the base electrode of the first stage NPN type transistor 18. And, the first stage NPN type transistor 18 amplifies an input voltage in an inverted phase. The second stage NPN type transistor 31 also amplifies an output voltage from the first stage NPN type transistor 18 in an inverted phase. Accordingly, an amplified signal of the same phase as that of the input signal applied to the input terminal 16 is outputted from the output terminal 17.
Since a voltage of a phase inverted to that of the input signal is basically generated at the emitter resistor 33 and is fed-back to the node between the input terminal 16 and the matching reactance element 20, an amplification factor of the amplifying circuit is suppressed by the negative feedback, to thereby realize a stable operation of the amplifying circuit without oscillation. Incidentally, the amplitude of the amplified signal is basically equal to an amplitude calculated by multiplying the amplitude of the input signal by the product of the amplification factor of the first stage of the NPN type transistor 18 and that of the second stage NPN type transistor 31.
FIG. 2 is a circuit diagram showing another prior art amplifying circuit disclosed in JP-A No. 7-263977. In this figure, reference numeral 42 indicates a feedback matching reactance element connected across an input terminal 16 and the emitter resistor 33 for matching an input impedance from the viewpoint of the input terminal 16 with a predetermined impedance. Other configurations are the same as those shown in FIG. 1, and therefore, parts corresponding to those shown in FIG. 1 are indicated by the same characters and the explanation thereof will be omitted.
With this configuration, even if a phase of the output signal is not just inverted to a phase of the input signal due to the impedance of a signal passage of the amplifying circuit, the phase of the output signal can be accurately adjusted to be inverted to the phase of the input signal, thus achieving effective feedback. In addition, as the feedback matching reactance element 42 used for such a purpose, like the matching reactance element 20, there is used a reactance element having an inductance of several nH if the frequency of the input signal is in the 800 MHz band.
Each of the prior art amplifying circuits having the above configurations has a problem that it cannot amplify signals of frequencies in the 800 MHz band used for portable telephone at a low noise level unless the amplifying circuit is monolithically formed on an expensive GaAs substrate having an insulation resistance higher than that of a silicon substrate.
Problems in the prior art amplifying circuits will be specifically described below.
When passive elements, such as resistor elements and reactance elements, are formed on a substrate for semiconductor devices, a parasitic capacitance formed between the substrate and the wiring pattern for connecting the passive elements exhibits a high-frequency wave cutting off characteristic. With respect to the capacity of the parasitic capacitance, the cut-off frequency of the parasitic capacitance formed on a silicon substrate is lower than that of the parasitic capacitance formed on a GaAs substrate. Therefore, if the above amplifying circuit is formed on a silicon substrate, it cannot amplify even an input signal of a frequency in the order of 800 MHz and -110 dBm with a low level of noises.
The emitter resistor generates thermal noises when a bias voltage is applied. The level of noises inputted to the base electrode of the first stage NPN type transistor is raised by the thermal noise generated by the emitter resistor. As a result, even if the input signal of a frequency in the order of 800 MHz and about -110 dBm cannot be amplified at a sufficient signal-to-noise ratio (hereinafter referred to as "S/N ratio"). In particular, in an amplifying circuit composed with impedance matching of a 50.OMEGA. system to transmit high-frequency signals, since the impedance of the matching reactance element and the feedback matching reactance element is small, the rise of the level of input noises due to feedback cannot be effectively suppressed.